_mm256_nmacc_pd
Visual Studio 2010 SP1 is required.
Microsoft Specific
Generates the FMA4 YMM instruction vfnmaddpd to perform a single-round double-precision floating-point negative multiply-add of its sources.
__m256d _mm_nmacc_pd (
__m256d src1,
__m256d src2,
__m256d src3
);
Parameters
[in] src1
A 256-bit parameter that contains four 64-bit floating-point values.[in] src2
A 256-bit parameter that contains four 64-bit floating-point values.[in] src3
A 256-bit parameter that contains four 64-bit floating-point values.
Return value
A 256-bit result r that contains four 64-bit floating-point values.
r[i] := -(src1[i] * src2[i]) + src3[i];
Requirements
Intrinsic |
Architecture |
|---|---|
_mm256_nmacc_pd |
FMA4 |
Header file <intrin.h>
Remarks
Each of the four double-precision floating-point values in src1 is multiplied by the corresponding value in src2. The result is negated and added to the corresponding value in src3, and the result is stored as the corresponding value in the destination. Each multiply-negate-add is performed with a single round at the end, as if intermediate results were computed to infinite precision.
The vfnmaddpd instruction is part of the FMA4 family of instructions. Before you use this intrinsic, you must ensure that the processor supports this instruction. To determine hardware support for this instruction, call the __cpuid intrinsic with InfoType = 0x80000001 and check bit 16 of CPUInfo[2] (ECX). This bit is 1 when the instruction is supported, and 0 otherwise.
Example
#include <stdio.h>
#include <intrin.h>
int main()
{
__m256d a, b, c, d;
int i;
for (i = 0; i < 4; i++) {
a.m256d_f64[i] = i;
b.m256d_f64[i] = 2.;
c.m256d_f64[i] = 3.;
}
d = _mm256_nmacc_pd(a, b, c);
for (i = 0; i < 4; i++) printf_s(" %.3lf", d.m256d_f64[i]);
printf_s("\n");
}
3.000 1.000 -1.000 -3.000