Handling Shared Interrupts (Windows Embedded CE 6.0)

  • Article

1/6/2010

A hardware designer determines when interrupt lines that run from a signaling device through prioritization logic to a microprocessor must be shared. Sharing is necessary because hardware platforms have a finite number of inputs.

When interrupts are shared, a microprocessor is aware of an interruption, but is not necessarily aware of which device interrupted it. To determine that, the operating system's exception handler might have to examine device-specific registers that indicate the state of a specified device's interrupt line.

You can register routines with the kernel that will be invoked automatically when a shared interrupt occurs. This routine is exposed as an entry point in a DLL that the kernel loads into its NK.exe process. Because this entry point is called during interrupt processing, it has the same restrictions as device power-up and power-down handlers do. For security reasons, the kernel does not allow the DLL to depend on imports from other DLLs. For that reason, it cannot link, for example, with Coredll.

The following sequence of steps shows how the OS handles shared interrupts:

  1. The ISR routine hooked to an interrupt in OEMInit must call NKCallIntChain, a kernel function, to examine a list of installed ISRs for the interrupt that has been signaled.
  2. If the first ISR determines that its associated device has asserted the interrupt, it performs any necessary work, and then returns the SYSINTR mapped to the interrupt.
    - or -
    If the ISR decides that no further processing by the IST is necessary, it returns SYSINTR_NOP.
  3. If the ISR determines that its associated device has not asserted the interrupt, it returns SYSINTR_CHAIN, which causes NKCallIntChain to call the next ISR in the chain.

The order of installing ISRs is important because it implies priority. The ISR first on the chain has priority over the succeeding ISRs on the chain.

See Also

Other Resources

Interrupt Handling
Defining an Interrupt Identifier
Implementing an ISR
Loader
PCI Bus Driver
Real-Time Priority System