ARM Intrinsic Functions
The following table shows ARM intrinsic functions with a description of the purpose of each.
| Programming element | Description |
|---|---|
| _AddSatInt | This ARM DSP-enhanced operation performs a saturating add instruction. |
| _DAddSatInt | This operation doubles Rn and saturates. |
| _DSubSatInt | This operation doubles Rn and saturates, then subtracts the result from Rm and saturates. |
| _PreLoad | This instruction is a soft preload instruction; that is, this instruction indicates to the memory system that a memory access from the specified address will occur shortly. |
| _ReadCoProcessor | This instruction causes the specified coprocessor registers to transfer values to two ARM registers. |
| _SmulAdd_SL_ACC | This operation multiplies the signed value in register Rs by the signed value in register Rm and then adds the result to the 40-bit accumulator, acc0. |
| _SmulAddHi_SW_ACC | This instruction multiplies the top half of Rm and the top half of Rs and accumulates the result to a single 40-bit accumulator. |
| _SmulAddHi_SW_SL | An ARM DSP-enhanced, signed-integer multiply-accumulate operation that multiplies the top half of register Rm and the top half of register Rs, producing a 32-bit product. |
| _SmulAddHi_SW_SQ | An ARM DSP-enhanced, signed integer multiply-accumulate operation that first performs a multiply on two 16-bit source operands from the top half of register Rm and the top half of Rs. |
| _SmulAddHiLo_SW_ACC | This ARM XScale instruction multiplies the top half of Rm and the bottom half of Rs and accumulates the result to a single 40-bit accumulator. |
| _SmulAddHiLo_SW_SL | An ARM DSP-enhanced, signed-integer multiply-accumulate operation that multiplies the top half of register Rm and the bottom half of register Rs to produce a 32-bit product. |
| _SmulAddHiLo_SW_SQ | An ARM DSP-enhanced, signed integer multiply-accumulate operation that multiplies the top half of register Rm and the bottom half of Rs. This |
| _SmulAddLo_SW_ACC | This ARM XScale instruction multiplies the bottom half of Rm and the bottom half of Rs and accumulates the result to a single 40-bit accumulator |
| _SmulAddLo_SW_SL | An ARM DSP-enhanced, signed-integer multiply-accumulate operation that multiplies the bottom half of register Rm and the bottom half of register Rs, producing a 32-bit product. |
| _SmulAddLo_SW_SQ | An ARM DSP-enhanced, signed integer multiply-accumulate operation that first performs a multiply on two 16-bit source operands from the bottom half of register Rm and the bottom half of Rs. |
| _SmulAddLoHi_SW_ACC | This ARM XScale instruction multiplies the bottom half of Rm and the top half of Rs and accumulates the result to a single 40-bit accumulator. |
| _SmulAddLoHi_SW_SL | An ARM DSP-enhanced, signed-integer multiply-accumulate operation that multiplies the bottom half of register Rm and the top half of register Rs, producing a 32-bit product. |
| _SmulAddLoHi_SW_SQ | An ARM DSP-enhanced, signed integer multiply-accumulate operation that multiplies the bottom half of register Rm and the top half of Rs. |
| _SmulAddPack_2SW_ACC | This ARM XScale instruction performs two 16x16 signed multiplication on packed half word data and accumulates these to a single 40-bit accumulator. |
| _SmulAddWHi_SW_SL | An ARM DSP-enhanced, signed integer multiply-accumulate operation that multiplies Rm with the top 16 bits of Rs then accumulates in Rn. |
| _SmulAddWLo_SW_SL | An ARM DSP-enhanced, signed integer multiply-accumulate operation that multiplies Rm with the bottom 16 bits of Rs, then accumulates in Rn. |
| _SmulHi_SW_SL | An ARM DSP-enhanced, signed integer multiply operation that multiplies the bottom half of register Rm times the bottom half of register Rs, producing a 32-bit result in Rd. |
| _SmulHiLo_SW_SL | An ARM DSP-enhanced, signed integer multiply operation that multiplies the top half of register Rm times the top half of register Rs, producing a 32-bit result in Rd. |
| _SmulLo_SW_SL | An ARM DSP-enhanced, signed integer multiply operation that multiplies the top half of register Rm times the bottom half of register Rs, producing a 32-bit result in Rd. |
| _SmulLoHi_SW_SL | An ARM DSP-enhanced, signed integer multiply operation that multiplies the bottom half of register Rm times the top half of register Rs, producing a 32-bit result in Rd. |
| _SmulWHi_SW_SL | An ARM DSP-enhanced, signed-integer multiplication operation. This instruction performs a 32x16 bit multiply on the 32-bit operand in Rm and the 16-bit source operand from top half of register Rs, and taking the upper 32 bits of the 48-bit product. |
| _SmulWLo_SW_SL | An ARM DSP-enhanced, signed-integer multiplication operation. This instruction performs a 32x16 bit multiply on the 32-bit operand in Rm and the 16-bit source operand from the bottom half of register Rs, and taking the upper 32 bits of the 48-bit product. |
| _SubSatInt | This ARM DSP-enhanced operation performs a saturating subtract instruction. It subtracts the value in Rn from the value in Rm, and places the result in register Rd. |
| _WriteCoProcessor | This instruction causes the specified ARM registers to transfer values to coprocessor registers. |
| BKPT | This ARM10 instruction causes a software breakpoint to occur. |
| CLZ | This ARM10 instruction counts the number of binary zero bits before the first binary one bit in a register value. |
See Also
Last updated on Thursday, April 08, 2004
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