SH3-DSP System Registers
The SH3-DSP has four system registers. The Procedure Register (PR) and the Program Counter (PC) perform the same function as in the SH-3. The Multiply and Accumulate High (MACH) and Multiply and Accumulate Low (MACL) store the results.
The following table shows the system registers.
Register | Description |
---|---|
MACH/MACL 31 – 0: | Multiply and accumulate high and low registers (MACH/L) store the results of multiplication and accumulation operations. |
PR 31 - 0: | Procedure register (PR) stores the subroutine procedure return address. |
PC 31 - 0: | Program counter (PC) indicates the start address of the current instruction. |
The DSR A0, X0, X1, Y0, and Y1 registers are also treated as system registers. Therefore, the SH3-DSP supports instructions for data transfer between general registers and A0, X0, X1, Y0, and Y1 registers.
See Also
SH3-DSP Registers | SH3-DSP General Registers | SH3-DSP Status Registers | SH3-DSP Control Registers | RS, RE, and ME Control Registers | DSP Unit Registers
Last updated on Thursday, April 08, 2004
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