Source Parameter Token

A source parameter token describes properties of a source register and is composed of the following bits:

Bits

[10:00] Bits 0 through 10 indicate the register number (offset in register file).

[12:11] Bits 11 and 12 are the fourth and fifth bits [3,4] for indicating the register type.

[13] For a pixel shader (PS) versions earlier than 3_0, bit 13 is reserved and set to 0x0.

For pixel shader (PS) version 3_0 and later and all versions of vertex shader (VS), bit 13 indicates whether relative addressing mode is used. If set to 1, relative addressing applies.

[15:14] Reserved for all versions of PS and VS. This value is set to 0x0.

[23:16] Bits 16 through 23 indicate channel swizzle. All arithmetic operations are performed in four (X,Y,Z,W) parallel channels. Swizzle specifies which source component participates in a channel of operation. For more information about swizzle, see the latest DirectX SDK documentation. The bits of this field specify swizzle for the following channels:

Bits Channel

17:16

Channel X swizzle

19:18

Channel Y swizzle

21:20

Channel Z swizzle

23:22

Channel W swizzle

The following values in any set of preceding bits specify the source component to be used in the channel of operation:

Value Component

0x0

Component X is used.

0x1

Component Y is used.

0x2

Component Z is used.

0x3

Component W is used.

For example, if the 19:18 bits are set to 0x2, then component Z is used as the source for the channel Y operation.

[27:24] Bits 24 through 27 indicate the source modifier. This 4-bit value indicates the following source modifier types:

Value Source modifier type

0x0

None

0x1

Negate

0x2

Bias

0x3

Bias and negate

0x4

Sign (bx2)

0x5

Sign (bx2) and negate

0x6

Complement

0x7

x2 (PS 1_4)

0x8

x2 and negate (PS 1_4)

0x9

dz (divide through by Z component - PS 1_4)

0xa

dw (divide through by W component − PS 1_4)

0xb

abs(x) compute absolute value

0xc

-abs(x) compute absolute value and negate

0xd

NOT. Applied only to the predication register, which is BOOL. Therefore, it is logical NOT.

0xe-0xf

Reserved

[30:28] Bits 28 through 30 are the first three bits [0,1,2] for indicating the register type.

[31] Bit 31 is 0x1.

Comments

Bits 28, 29, 30, 11, and 12 form a 5-bit value that indicates the register type. For information about register types, see Shader Register Types.

Requirements

Available in Windows Vista and later versions of the Windows operating systems.