Miscellaneous Operations (Floating-Point SSE2 Intrinsics) 

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Microsoft Specific

For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.

SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.

The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.

__m128d _mm_unpackhi_pd (__m128d a, __m128d b);

UNPCKHPD

Interleaves the upper double-precision, floating-point values of a and b.

r0 := a1
r1 := b1

__m128d _mm_unpacklo_pd (__m128d a, __m128d b);

UNPCKLPD

Interleaves the lower double-precision, floating-point values of a and b.

r0 := a0
2 := b0

int _mm_movemask_pd (__m128d a);

MOVMSKPD

Creates a two-bit mask from the sign bits of the two double-precision, floating-point values of a.

r := sign(a1) << 1 | sign(a0)

__m128d _mm_shuffle_pd (__m128d a, __m128d b, int i);

SHUFPD

Selects two specific double-precision, floating-point values from a and b, based on the mask i. The mask must be an immediate. See Macro Function for Shuffle Using Streaming SIMD Extensions 2 Instructions section for a description of the shuffle semantics.

END Microsoft Specific

See Also

Reference

Floating-Point Intrinsics Using Streaming SIMD Extensions 2 Instructions