Conversion Operations (SSE2)
Microsoft Specific
Each conversion intrinsic takes one data type and performs a conversion to a different type. Some conversions such as _mm_cvtpd_ps result in a loss of precision. The rounding mode used in such cases is determined by the value in the MXCSR register. The default rounding mode is round-to-nearest. Note that the rounding mode used by the C and C++ languages when performing a type conversion is to truncate. The _mm_cvttpd_epi32, _mm_cvttsd_si32, and _mm_cvttps_epi32 intrinsics use the truncate rounding mode regardless of the mode specified by the MXCSR register.
The conversion-operation intrinsics are listed in the following table, followed by detailed descriptions.
SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.
The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.
Conversion Operations
| Intrinsic name | Corresponding instruction | Return type | Parameters |
|---|---|---|---|
CVTPD2PS |
__m128 |
(__m128d a) |
|
CVTPS2PD |
__m128d |
(__m128 a) |
|
CVTDQ2PD |
__m128d |
(__m128i a) |
|
CVTPD2DQ |
__m128i |
(__m128d a) |
|
CVTSD2SI |
int |
(__m128d a) |
|
CVTSD2SS |
__m128 |
(__m128 a, __m128d b) |
|
CVTSI2SD |
__m128d |
(__m128d a, int b) |
|
CVTSS2SD |
__m128d |
(__m128d a, __m128 b) |
|
CVTTPD2DQ |
__m128i |
(__m128d a) |
|
CVTTSD2SI |
int |
(__m128d a) |
|
CVTDQ2PS |
__m128 |
(__m128i a) |
|
CVTPS2DQ |
__m128i |
(__m128 a) |
|
CVTTPS2DQ |
__m128i |
(__m128 a) |
|
CVTPD2PI |
__m64 |
(__m128d a) |
|
CVTTPD2PI |
__m64 |
(__m128d a) |
|
CVTPI2PD |
__m128d |
(__m64 a) |
For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.
END Microsoft Specific
See Also
Reference
Floating-Point Intrinsics Using Streaming SIMD Extensions 2 Instructions