OAL Migration Issues

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The following table lists language elements that are needed in Windows CE .NET and any associated microprocessors.

Microprocessor:
language element		 Description
All microprocessors: GetIdleTime The support of this function requires that you declare and calculate the following variables in the OAL: 
// Translation constant in 1 ms units.
extern DWORD idleconv;
// 64-bit idle time in ms.
extern DWORD curridlehigh, curridlelow;
All microprocessors In Windows CE .NET, the OEMIdle function name is common to all microprocessors.
x86: IOCTL_HAL_REBOOT In Windows CE .NET, the x86 microprocessor implementation of IOCTL_HAL_REBOOT is unique because there is conditionally compiled code that offers two different implementations. The first, by default, sets a global variable flag that is noticed by the OAL ISR. This triggers a re-entry into the Eboot StartUp routine. Eboot still resides in RAM. The other implementation, which is selectable during build-time based either on a pre-processor flag or by uncommenting the code, writes to a hardware register on the x86 motherboard. The hardware reset signal is therefore asserted. This is the same as pressing the reset button and then causing the BIOS to run.
x86: OEMFlushCache The OEMFlushCache function is needed for all x86 platforms. The kernel calls this function when the CacheSync function is called.
SHx: SH3DSP In Windows CE .NET, you need to declare the export_SH3DSP variable. Set the data to the following value: 
_SH3DSP   .data.l 0

The SH3DSP variable is used to identify an SH3 microprocessor with DSP support. A value of 1 indicates there the DSP is present; a value of 0 indicates otherwise.
SHx: SH4CacheLines This variable describes the number of cache lines supported by the SH4 microprocessor.
SHx: Nested interrupts In the SHx architecture, the IntrPrio structure provides the kernel with information about what interrupts are masked when the current interrupt is being handled.

To gain access to the structure, the extern BYTE IntrPrio[]; variable must be declared in the OAL.
MIPS: Nested interrupts In the MIPS architecture, the kernel uses the IntrPriority and IntrMask structures to provide information about nested interrupts. The structures provide the kernel with the information about what interrupts are masked when the current interrupt is being handled.
ARM: OEMARMCacheMode This function allows you to change the cache bits configurations in the page table entries for only the ARM processors. These bits determine cache mode and write buffer use. The ARM kernels still default to their previous settings but in Windows CE .NET you can change those settings if desired, and the ARM microprocessor supports the change. This function is required in every ARM OAL.
ARM: OEMInterruptHandlerFIQ Windows CE .NET enables the routing of the Fast Interrupt reQuest (FIQ) OAL. To facilitate the routing, you need to implement the OEMInterruptHandlerFIQ function.

This function must be part of the your OAL for any ARM build to succeed, even if it is just a stub.
ARM: OEMInterruptHandler Windows CE .NET enables nesting support if you require it. The kernel calls the OEMInterruptHandler function when a typical interrupt occurs.

See Also

GetIdleTime | OEMIdle | OEMFlushCache | CacheSync | IntrPrio | IntrMask | OEMARMCacheMode | OEMInterruptHandlerFIQ | OEMInterruptHandler | Migration from Windows CE 2.12 to Windows CE .NET

Last updated on Wednesday, April 13, 2005

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